SSM4321是一款全集成、高效、D级音频放大器，提供输出电压、输出电流和PVDD电源电压的数字输出。针对移动电话应用而实现的高性能设计。该应用电路只需极少的外部元件，并且放大器采用2.5 V至5.5 V电源供电，输入/输出则采用1.42 V至3.6 V电源供电。采用5.0 V电源和一个0.1 Ω V/I检测电阻时，SSM4321能够提供2.2 W连续输出功率，驱动4 Ω负载，总谐波失真加噪声(THD + N)小于1%。

SSM4321采用高效率、低噪声调制方案，无需外部LC输出滤波器。即使输出功率较低时，该调制方案也能提供高效率。采用5.0 V电源时，SSM4321能够以89%的效率将1.4 W功率驱动到8Ω负载，信噪比(SNR)大于100 dB。

SSM4321内置检测电路，可检测输出电流、输出电压和PVDD电源电压。电流检测采用输出引脚和负载之间连接的外部检测电阻来实现。输出电流和电压均被发送至具有16位分辨率的ADC；PVDD电源电压则被发送至一个具有8位分辨率的ADC。

这些ADC的输出通过TDM或I2S输出串行端口提供。SLOT引脚用来决定TDM接口上将使用四个可能输出时隙中的哪一个。通过反转BCLK和FSYNC的引脚连接可以选择一个立体声I2S接口。还可以通过SLOT引脚选择电压和电流数据的直接PDM位流。

与其它D类架构相比，采用扩频脉冲密度调制(PDM)可提供更低的电磁辐射。扩频PDM固有的随机特性可以避免多个互相靠近的放大器发生时钟交调（差频效应）。

SSM4321产生的EMI辐射极低，大幅降低了D类输出（特别是100 MHz以上）的辐射。SSM4321的超低EMI辐射特性也有助于解决天线和RF灵敏度问题。

该器件包含一个高度灵活的增益选择引脚，只需一个串联电阻就可选择0 dB、3 dB、6 dB、9 dB或12 dB的增益设置。输入阻抗固定为80 kΩ，与所选增益无关。

SSM4321具有关断模式，关断电流典型值小于1 μA。关断通过移除BCLK输入来使能。BCLK引脚上必须有时钟信号，该器件才能正常工作。该器件还内置爆音与咔嚓声抑制电路，可以使器件开启和关闭期间输出端的电压突波较小，从而降低启动和停用时的声频噪声。

SSM4321的额定温度范围为−40°C至+85°C工业温度范围。它内置热关断和输出短路保护功能，采用16引脚、0.4 mm间距、1.74 mm x 1.74 mm、无卤晶圆级芯片规模封装(WLCSP)。

应用

• 移动电话
• MP3播放器
• 便携式电子设备

• 采用扩频Σ-Δ调制的无滤波器D类放大器
• 提供输出电压、输出电流和PVDD电源电压的数字输出
• 输出电流检测的信噪比(SNR)为72dB，电压检测的SNR则为77dB
• TDM或多芯片I2S从机输出接口
  -- 一条总线最多支持4个芯片
  -- 工作频率为8 kHz至48 kHz
• I2S/左对齐从机输出接口
  -- 一条总线支持1或2个芯片
  -- 工作频率为8 kHz至48 kHz
• PDM输出接口的工作频率范围为1 MHz至6.144 MHz

• 采用5.0 V电源供电时，能够以2.2 W功率驱动4 Ω负载，以1.4 W功率驱动8 Ω负载，总谐波失真加噪声(THD + N)小于1%。
• 采用5.0V电源时，效率为89%，以1.4 W功率驱动8 Ω + 0.2Ω RSENSE扬声器，信噪比(SNR)大于100 dB
• 高电源抑制比（217 Hz时）：86 dB
• 放大器电源电压为2.5 V至5.5 V
• 输入/输出电源电压为1.42 V至3.6 V
• 欲了解更多特性，请参考数据手册

SSM4321ACBZ-R7，封装：16-Ball WLCSP (1.74mm x 1.74mm)，包装形式及数量：卷带，3000，工作温度：-40 to 85C，AD官网报价：

SSM4321ACBZ-RL，封装：16-Ball WLCSP (1.74mm x 1.74mm)，包装形式及数量：卷带，10000，工作温度：-40 to 85C，AD官网报价：

EVAL-SSM4321：SSM4321 Evaluation Board

The SSM4321 is a fully integrated, high efficiency Class-D audio amplifier with digitized output of output voltage, output current, and PVDD supply. It is designed to maximize performance for mobile phone applications. The application circuit requires a minimum of external components and operates from a 2.5 V to 5.5 V supply for the amplifier and a 1.42 V to 3.6 V supply for IO. It is capable of delivering 2.2 W of continuous output power with less than 1% THD + N driving an 4 Ω load from a 5.0 V supply with a 0.1Ω V/I sense resistor.

The SSM4321 includes circuitry to sense output current, output voltage, and the PVDD supply voltage. Current sense is performed using an external sense resistor that is connected between an output pin and the load. Output current and voltage are sent to an ADC with 16-bit resolution and PVDD is sent to an ADC with 8-bit resolution. The outputs of these ADCs are available on the TDM or I2S output serial port. The SLOT pin is used to determine which of 4 possible output slots is used on the TDM interface. A stereo I2S interface can be selected by swapping the pin connections for BCLK and FSYNC. Alternatively, a direct PDM bitstream of voltage and current data can be selected via the SLOT pin.

Spread spectrum pulse density modulation (PDM) is used to provide lower EMI-radiated emissions compared with other Class-D architectures. The inherent randomized nature of spread spectrum PDM eliminates clock intermodulation (beating effect) of several amplifiers in close proximity. The SSM4321 includes an optional modulation select pin that enables a low EMI mode, which significantly reduces the radiated emissions at the Class-D outputs, particularly above 100 MHz. With this option selected, the SSM4321 can pass FCC Class B radiated emissions testing with a 50 cm unshielded speaker cable without any external filtering.

The device also includes a flexible gain select pin that only requires one series resistor to select among 0 dB, 3 dB, 6 dB, 9 dB, or 12 dB. The benefit of this is to improve gain matching between multiple SSM4321 devices within a single application as compared to using external resistors to set gain.